A field effect transistor (FET) device can be used in an amplifier circuit to increase radio frequency (RF) power. A conventional FET has a simple structure and can be fabricated easily. Gallium arsenide has been used to obtain high frequency performance. Wide bandgap semiconductor materials, such as silicon carbide and gallium nitride, are used to obtain high power performance, especially in adverse operating conditions such as high temperature and high radiation conditions.
The active layer of a FET pertains to the semiconductor layer on which a drain region, a source region and a gate region exist, with the gate region located between the drain and source. Electrical carriers of either n-type or p-type conductivity exist in the active layer, and will move in response to an electric field generated between the source region and the drain region formed thereon, and in response to signal voltage applied to the gate region formed thereon. The active channel is that portion within the active layer in which the electrical carriers move in response to a signal on the gate contact. The speed of a FET pertains to its ability to operate at high frequency, and high carrier mobility is required for high speed response. Enhancements in the ability of a FET to operate at high frequencies increase its functionally and the number of potential applications in which it can be employed. Various designs for epitaxially layered structures have been disclosed to increase performance of FETs at high frequencies, and to extend the maximum frequency at which a FET will operate.
There exist several FET types. For example, a FET may have no intermediate layer between a metal gate contact and the active layer, in which case a metal semiconductor field effect transistor (MESFET) is formed. Alternatively, a FET may further include an additional material layer intermediate between the gate contact and the active layer, to form a junction field effect transistor (JFET), or may include a metal oxide material layer between the gate contact and the active layer to form a metal oxide field effect transistor (MOSFET).
The upper limit for the operating frequency for an epitaxially layered FET can be improved by several methods. It is desirable to have high electron mobility for a FET that has n-type carriers in the active channel. For high frequency applications, the preferred active layer materials have been those having a high saturated electron drift velocity. Because the semiconductor layers of a FET are epitaxial, then the layer upon which each layer is grown affects the overall characteristics of the device (see, e.g., U.S. Pat. No. 5,270,554 to Palmour, incorporated herein by reference).
Various FET and related structures are disclosed in the following U.S. patents, incorporated herein by reference as if set forth in their entireties:
Sriran5,821,576Baliga5,399,883Tehrani et al.5,081,511Strifler et al.4,935,377Ueno5,227,644Hasegawa5,643,811Palmour5,270,554Alok et al.6,559,068Yang et al.6,806,157Goronkin et al.5,298,441Buynoski5,729,045Donath et al.6,274,916
With regard to the present invention, it is noted that a depletion layer region occurs at the interfacial boundary of an n-type semiconductor layer epitaxially grown on a p-type semiconductor layer. The thickness of the depletion layer region can be increased by suitable application of a bias voltage across the n-type and p-type semiconductor layers.
Application of such a voltage bias to control the thickness of the depletion region in a FET that has a first semiconductor layer upon which an active semiconductor layer is epitaxially grown could be made by application of bias voltage between the gate contact and the substrate, provided that: (1) there exists a suitable electrode on the substrate, (2) all layers between the substrate and gate contact were sufficiently and properly conducting, and (3) a suitable gate voltage bias circuit element existed between the gate contact and the substrate electrode.
In similar fashion, application of such a voltage bias to control the thickness of the depletion region in a FET that has a first semiconductor layer upon which an active semiconductor layer is epitaxially grown alternatively could be made by application of bias voltage between the gate contact and the first semiconductor layer, provided that: (1) there exists a suitable electrode on the first semiconductor layer, and (2) a suitable gate voltage bias circuit element existed between the gate contact and the first semiconductor layer electrode.
With regard to the present invention, an epitaxially layered MESFET can be designed to have either n-type material or p-type material in the active layer, with the electrical carriers in the active layer being n-type or p-type, accordingly. The upper limit for the operating frequency for an epitaxially layered MESFET that has p-type carriers in the active layer would be improved by having a higher value for the mobility for p-type carriers that are in close proximity to the gate contact.
Similarly, the upper limit for the operating frequency for an epitaxially layered MESFET that has n-type carriers in the active layer would be improved by having a higher value for the mobility for n-type carriers in the active layer that are in close proximity to the gate contact.
With regard to the present invention, wide bandgap semiconductor materials are useful for device operation at high temperatures. Zinc oxide is a wide bandgap material, and it also possesses good radiation resistance properties. Wide bandgap semiconductor films of zinc oxide are now available in both n-type and p-type carrier types that have properties sufficient for fabrication of semiconductor devices.
In particular, White et al. (U.S. Pat. No. 6,291,085) disclosed a p-type doped zinc oxide film, wherein the film could be incorporated into a semiconductor device including an FET.
In addition, White et al. (U.S. Pat. No. 6,342,313) disclosed a p-type doped metal oxide film having a net acceptor concentration of at least about 1015 acceptors/cm3, wherein:
(1) the film is an oxide compound of an element selected from the groups consisting of Group 2 (beryllium, magnesium, calcium, strontium, barium and radium), Group 12 (zinc, cadmium and mercury), Group 2 and 12, and Group 12 and Group 16 (oxygen, sulfur, selenium, tellurium and polonium) elements, and
(2) wherein the p-type dopant is an element selected from the groups consisting of Group 1 (hydrogen, lithium, sodium, potassium, rubidium, cesium and francium), Group 11 (copper, silver and gold), Group 5 (vanadium, niobium and tantalum) and Group 15 (nitrogen, potassium, arsenic, antimony and bismuth) elements.
Further, White et al. (U.S. Pat. No. 6,410,162) disclosed a p-type doped zinc oxide film, wherein the p-type dopant is selected from Group 1, 11, 5 and 15 elements, and wherein the film is incorporated into a semiconductor device including a FET. This patent also disclosed a p-type doped zinc oxide film, wherein the p-type dopant is selected from Group 1, 11, 5 and 15 elements, and wherein the film is incorporated into a semiconductor device as a substrate material for lattice matching to materials in the device.
Each and all of the above-referenced documents and disclosures are incorporated by reference herein, and made a part of this application for patent, as if set forth in their entireties herein.
The power, efficiency, function and speed of a semiconductor FET device is limited by the mobility of carriers, either n-type or p-type, in the active layer. Silicon carbide and gallium nitride materials are used as materials in FETs to increase performance at high frequency and high power operating conditions. However, such performance is limited due to the low mobility of carriers in the active layer.
Those skilled in the art will appreciate that a higher mobility for carriers in the active layer will improve the performance of a field effect transistor at high frequency.
FET devices that can operate at high speed are desirable for use in many commercial and military sectors, including, but not limited to, areas such as communication networks, radar, sensors and medical imaging.
Therefore, it would be desirable to provide a FET which may be fabricated of wide bandgap semiconductor materials such as zinc oxide, silicon carbide, and gallium nitride, and alloys of each material, and with the FET having an epitaxially layered structure such that the FET has improved performance in function and speed and can be used at high frequencies.
It would also be desirable to provide a FET which may be fabricated of semiconductor materials such as silicon and gallium arsenide, with the FET having an epitaxially layered structure such that the FET has improved performance in function and speed and can be used at high frequencies.
There also exists a need for a FET device that has carriers of n-type with high mobility at room temperature.
Still further, there exists a need for a FET device that has carriers of p-type with high mobility at room temperature.
It would also be desirable to provide a FET device that has carriers with high mobility that that can be utilized at high frequencies.
There also exists a need for a FET for which the thickness of the active channel layer in which carriers move can be adjusted so as to achieve higher carrier mobility.
There also exists a need for an epitaxially layered FET structure with a suitable gate voltage bias supply circuit element that can be employed to adjust the thickness of the active channel layer in which carriers move in close proximity to the gate contact, and to increase the mobility of carriers in the active channel layer in close proximity to the gate electrode.